郭怡

讲师

  • 研究方向:低功耗集成电路设计,近似计算,面向FPGA的新兴计算电路。
  • 联系方式:guoyi@ynu.edu.cn; guoyi@fuji.waseda.jp
  • 地址:信息学院1309

教育背景

2017.09-2021.04  日本早稻田大学  集成电路设计  工学博士(国家公派留学)

2015.09-2017.09  日本早稻田大学  集成电路设计  工学硕士

2012.09-2016.09  四川大学  软件工程  工学学士



代表性论文

主要期刊论文:

[1] Y. Guo, H. Sun, P. Lei and S. Kimura, “Approximate FPGA-based Multipliers using Carry-Inexact Elementary Modules”, in IEICE Transactions, vol. E103-A, no. 09, pp. 1054-1062, 2020.

[2] Y. Guo, H. Sun, P. Lei and S. Kimura, “Design of Low-Cost Approximate Multipliers Based on Probability-Driven Inexact Compressors”, in IEICE Transactions, vol. E102-A, no. 12, pp. 1781-1791, 2019.

 

主要会议论文:

[1] Y. Guo, H. Sun, and S. Kimura, “Small-area and Low-power FPGA-based Multipliers using Approximate Elementary Modules”, in Asia and South Pacific Design Automation Conference (ASP-DAC), 2020.

[2] Y. Guo, H. Sun, and S. Kimura, “Energy-Efficient and High-Speed Approximate Signed Multipliers with Sign- Focused Compressors”, in IEEE International System-On-Chip Conference (SOCC), 2019.

[3] Y. Guo, H. Sun, L. Guo and S. Kimura, “Low-Cost Approximate Multiplier Design using Probability-Driven Inexact Compressors”, in IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 2018.

[4] Y. Guo, H. Sun, and S. Kimura, “Design of Power and Area Efficient Lower-Part-OR Approximate Multiplier”, in IEEE Region 10 Conferences (TENCON), 2018.

[5] Rongyu Ding, Yi Guo, Heming Sun, Shinji Kimura, Energy-Efficient Approximate Floating-Point Multiplier Based on Radix-8 Booth Encoding, in International Conference on ASIC(ASICON), 2021.

[6] J. Li, Y. Guo, and S. Kimura, “Accuracy-Configurable Low-Power Approximate Floating-Point Multiplier Based on Mantissa Bit Segmentation”, in IEEE Region 10 Conference (TENCON), 2020.

[7] Y. Xu, Y. Guo, and S. Kimura, “Approximate Multiplier Using Reordered 4-2 Compressor with OR-based Error Compensation”, in IEEE International Conference on ASIC (ASICON), 2019.

[8] X. Sun, Y. Guo, and S. Kimura, “A Radix-4 Partial Product Generation-Based Approximate Multiplier for High-speed and Low-power Digital Signal Processing”, in IEEE International Conference on Electronics Circuits and Systems (ICECS), 2018.

[9] Z. Liu, Y. Guo, and S. Kimura, “Energy-Efficient and High-Performance Approximate Multiplier Using Compressors Based on Input Reordering”, in IEEE Region 10 Conferences (TENCON), 2018.


科研项目

[1] “Low-power designs based on approximate computing”,日本东芝记忆公司-早稻田大学联合科研基金奖励项目,2018.10-2020.03,主持。


奖励和荣誉

[1] 日本东芝记忆公司-早稻田大学联合青年科研奖励项目,年度优秀研究者,2020。

[2]  IEICE Excellent student author award for ASP-DAC,2020。